Penn State Synthesizes Graphene Wafer
Source From: Semiconductor International
Posted Date: 2010-03-15
Researchers in the Electro-Optics Center (EOC) Materials Division at Pennsylvania State University have produced 100 mm diameter graphene wafers, a development considered to be a critical milestone in the development of graphene for high-frequency electronic devices.
Graphene is a 2-D layer of tightly bound carbon atoms arranged in hexagonal arrays. Because of its phenomenal electronic properties, graphene has the potential to enable terahertz computing at processor speeds 100-1000× faster than silicon.
Achieving 100 mm graphene wafers has put the Penn State EOC in a leading position for the synthesis of ultralarge graphene and graphene-based devices, according to EOC materials scientist Joshua Robinson. "The graphene is synthesized from silicon carbide through silicon sublimation, which is often referred to as epitaxial graphene."
The technique was first pioneered at Georgia Tech, and the Penn State group used it to scale up to 100 mm wafers. "Primarily, it entails taking a silicon carbide substrate and putting it in a physical vapor transport furnace at 1500° to 1700°C to form the graphene," Robinson said. "At those temperature levels the surface silicon atoms sublimate, leaving behind a film layer of excess carbon one or two atoms thick, which rearranges into hexagonal patterns, forming the graphene."
A 100 mm graphene wafer with approximately 75,000 devices and test structures. The inset shows a single chip. (Source: Penn State)
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To fabricate the actual devices the group used standard semiconductor processing. "The first thing we do is isolate the graphene where we want it through dry etching. We then put contacts down for the transistor's source and drain, then isolation, source drain metallization, and atomic layer deposition to deposit a high-k dielectric (hafnium oxide or aluminum oxide). Following that we lay down the gate metal, so you end up with metal contact directly touching the graphene, then a dielectric layer, and on top of it the gate."
With the support of the Naval Surface Warfare Center, the EOC researchers are initially focusing on graphene materials to improve transistor performance in various radio frequency applications, and have fabricated RF FETs on 100 mm graphene wafers.
Another goal of the Penn State researchers is to improve the electron mobility of the Si-sublimated wafers to nearer the theoretical limit, which is approximately 100× faster than silicon. "That will require improvements in the material quality and device design," Robinson said, "but there is significant room for improvements in growth and processing."
Robinson said processing for the graphene wafer would require no differences or new developments in current semiconductor processing. However, because it would be done on a silicon carbide substrate, at present it would most likely be produced in III-V fabs.
"One of the things we are trying to do is move that over to silicon so that we can do a direct integration with silicon fabs," he said. Although one of the research group's ultimate goals is to produce a 300 mm wafer, this is impossible at present using silicon carbide because substrates larger than 100 mm do not yet exist. "However, there are still things to improve on 100 mm; one is uniformity and another is device technology," Robinson said.
"It is similar to the situation with materials such as gallium nitride or gallium arsenide. Gallium nitride HEMTs have been around for some ten years and they are still trying to optimize them for reliability." Currently, the group is working with the Navy in naval-centric applications, primarily S- and X-band ship radar. Although the researchers cannot at the moment disclose the results obtained in terms of device capability, they did admit that the results obtained to date far exceed what would have been expected using common silicon-based technologies.
Graphene's phenomenal properties are widely recognized, and tantalizingly near to application. When this happens, the sky is the limit for electronic applications in terms of speed and power. "It's doable, and is just a matter of money and work," Robinson said. "If you look through the literature you will find that while graphene has an intrinsic carrier mobility of 200,000, which is what everybody touts, most often you find devices that are on the order of a few thousand-orders of magnitude below what you could achieve. That is one of the major things that we are pushing for: getting rid of all the limiting extrinsic factors."
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